Virtual Interface Technology for 3D-IC Metrology: TSV profile (depth, top & bottom CD) , Remaining Silicon Thickness (RST), Copper Nail Height, Bump Height and Cu pillar Height, Edge trim profile.
Dimensional metrology system for 3D-IC application: Through Silicon Via (TSV) depth, top CD, bottom CD, remaining silicon thickness (RST), copper pillar height, bump height, and many more. Fully automated cassette to cassette system for 300mm wafers. SECS/GEM option. Warp, Roughness, and Thin Film Thickness measurement options.
New high speed, high accuracy non-contact characterization of thin wafers, through silicon vias (TSV), bumps, MEMS structures and novel materials. FSM 8108 VITE can be employed in the front-end and backend. It provides thickness, TTV, and topography of Si and compound materials, edge trim geometry, multilayer thickness and topography of wafers on tape, on sapphie,or on glass. Measurement of warp of highly warped wafers and measurement of thick films.
Frontier Semiconductor moved to its new location: 165 Topaz St., Milpitas, CA 95035, USA.May 01, 2018
FSM will be presenting at Semicon West in San Francisco, Ca, July 10-12, 2018. Please visit us at booth #2332 in the South Hall.Jul 10, 2018
FSM will be presenting at SPIE Optics and Photonics Conference in San Diego.Aug 20, 2018
FSM will be presenting at SPIE The international society for optics and photonics - DEFENSE COMMERCIAL SENSINGApr 16, 2019